From d21ea4d6b40f0f1bc234183aaa95033b23e869dd Mon Sep 17 00:00:00 2001 From: Mansur Mukimbekov Date: Wed, 15 Jul 2026 12:59:25 -0400 Subject: [PATCH 1/2] feat: add zicclsm and unaligned scalar mem target features --- .../src/spec/targets/riscv64im_unknown_openvm_elf.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/compiler/rustc_target/src/spec/targets/riscv64im_unknown_openvm_elf.rs b/compiler/rustc_target/src/spec/targets/riscv64im_unknown_openvm_elf.rs index 1232fce7b9860..b732b481ee254 100644 --- a/compiler/rustc_target/src/spec/targets/riscv64im_unknown_openvm_elf.rs +++ b/compiler/rustc_target/src/spec/targets/riscv64im_unknown_openvm_elf.rs @@ -29,7 +29,7 @@ pub(crate) fn target() -> Target { max_atomic_width: Some(64), atomic_cas: true, - features: "+m".into(), + features: "+m,+zicclsm,+unaligned-scalar-mem".into(), llvm_abiname: "lp64".into(), executables: true, panic_strategy: PanicStrategy::Abort, From 46b4c0d04c19d3316d18a7b87dd17bf4422ddfe0 Mon Sep 17 00:00:00 2001 From: Ayush Shukla Date: Thu, 16 Jul 2026 17:30:16 +0200 Subject: [PATCH 2/2] feat: enable linker relaxation for OpenVM target --- .../spec/targets/riscv64im_unknown_openvm_elf.rs | 4 ++-- .../riscv64im-unknown-openvm-elf.md | 15 +++++++-------- 2 files changed, 9 insertions(+), 10 deletions(-) diff --git a/compiler/rustc_target/src/spec/targets/riscv64im_unknown_openvm_elf.rs b/compiler/rustc_target/src/spec/targets/riscv64im_unknown_openvm_elf.rs index b732b481ee254..f718d03e3b5d6 100644 --- a/compiler/rustc_target/src/spec/targets/riscv64im_unknown_openvm_elf.rs +++ b/compiler/rustc_target/src/spec/targets/riscv64im_unknown_openvm_elf.rs @@ -8,7 +8,7 @@ pub(crate) fn target() -> Target { data_layout: "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128".into(), llvm_target: "riscv64".into(), metadata: TargetMetadata { - description: Some("OpenVM zero-knowledge Virtual Machine (RV64IM ISA)".into()), + description: Some("OpenVM zero-knowledge Virtual Machine (RV64IM_ZICCLSM ISA)".into()), tier: Some(3), host_tools: Some(false), std: Some(true), @@ -29,7 +29,7 @@ pub(crate) fn target() -> Target { max_atomic_width: Some(64), atomic_cas: true, - features: "+m,+zicclsm,+unaligned-scalar-mem".into(), + features: "+m,+zicclsm,+unaligned-scalar-mem,+relax".into(), llvm_abiname: "lp64".into(), executables: true, panic_strategy: PanicStrategy::Abort, diff --git a/src/doc/rustc/src/platform-support/riscv64im-unknown-openvm-elf.md b/src/doc/rustc/src/platform-support/riscv64im-unknown-openvm-elf.md index 260cff608e6fa..42ab96f22071a 100644 --- a/src/doc/rustc/src/platform-support/riscv64im-unknown-openvm-elf.md +++ b/src/doc/rustc/src/platform-support/riscv64im-unknown-openvm-elf.md @@ -2,7 +2,7 @@ **Tier: 3** -Target for [OpenVM](https://github.com/openvm-org/openvm/) virtual machines with the RV64IM ISA and custom RISC-V extensions defined through OpenVM's extension framework. +Target for [OpenVM](https://github.com/openvm-org/openvm/) virtual machines with the RV64IM_ZICCLSM ISA and custom RISC-V extensions defined through OpenVM's extension framework. ## Target maintainers @@ -35,9 +35,10 @@ default allocator. Partial support for the Rust `std` library is provided using Further commentary and the `openvm` crate's higher-level I/O helpers are documented in the [OpenVM book](https://docs.openvm.dev/book/writing-apps/writing-a-program#rust-std-library-support). The target's execution environment is single-threaded, non-preemptive, and does not support -privileged instructions. At present, unaligned accesses are not supported and will result in execution traps. The binaries expect no operating system and can be thought -of as running on bare-metal. The target does not use `#[target_feature(...)]` or -`-C target-feature=` values. +privileged instructions. Misaligned scalar loads and stores are supported. The binaries expect no +operating system and can be thought of as running on bare-metal. + +The target enables the LLVM features `+m,+zicclsm,+unaligned-scalar-mem,+relax` by default. Binaries are expected to be ELF. @@ -97,10 +98,8 @@ The target currently does not support running the Rust test suite. ## Cross-compilation toolchains and C code -Compatible C code can be built for this target on any compiler that has a RV64IM -target. On clang and ld.lld linker, it can be generated using the -`-march=rv64im`, `-mabi=lp64` with llvm features flag `features=+m` and llvm -target `riscv64-unknown-none`. +Compatible C code can be built with Clang and ld.lld using +`--target=riscv64-unknown-none -march=rv64im_zicclsm -mabi=lp64 -mno-strict-align -mrelax`. [RISC-V specification]: https://riscv.org/wp-content/uploads/2015/01/riscv-calling.pdf [OpenVM]: https://github.com/openvm-org/openvm/