[TRTLLM-15177][test] Wire remaining Kimi K3 MoE unit tests into L0 (Hopper) - #17711
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…opper) test_kimi_k3_mlp.py, test_kimi_k3_moe_gate.py, and test_kimi_k3_situ_and_mul.py existed in the tree but were referenced by no L0 test list, so they never ran in pre-merge CI. They are any-CUDA (Triton trtllm::situ_and_mul op plus a torch reference, gated on requires_cuda only, not SM100/SM103), so wire them into the H100 pre-merge single-GPU list next to the other MoE-component unit tests rather than spend scarce Blackwell capacity. The Blackwell-gated K3 suites (kimi_kda, kimi_k3_attn_res, kimi_k3_situ_moe, KDA parity) are already wired in l0_b200.yml and l0_gb300_multi_gpus.yml. Closes item 1.4 of TRTLLM-15177 for the previously-unwired K3 MoE files. Signed-off-by: Brian Nguyen <brnguyen@nvidia.com>
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WalkthroughThe H100 PyTorch MPI pre-merge test list now includes Kimi K3 MoE unit tests for the MLP, MoE gate, and ChangesKimi K3 MoE Test Coverage
Estimated code review effort: 1 (Trivial) | ~2 minutes Merge Risk: 🟡 Moderate · up to This change only adds three existing CUDA unit tests to the Hopper pre-merge list, with no product-code changes. It is not merge-ready until the required coverage-scope verdict is supplied or explicitly accepted. Suggested reviewers: 🚥 Pre-merge checks | ✅ 5✅ Passed checks (5 passed)
✨ Finishing Touches🧪 Generate unit tests (beta)
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…opper) (NVIDIA#17711) Signed-off-by: Brian Nguyen <brnguyen@nvidia.com>
Description
Three Kimi K3 MoE unit tests exist in the tree but are referenced by no L0
test list, so they never run in pre-merge CI:
tests/unittest/_torch/modules/moe/test_kimi_k3_mlp.pytests/unittest/_torch/modules/moe/test_kimi_k3_moe_gate.pytests/unittest/_torch/modules/moe/test_kimi_k3_situ_and_mul.pyAll three are any-CUDA: they exercise the Triton
trtllm::situ_and_mulop andthe
noaux_tc_oprouting op against a torch reference, gated onrequires_cudaonly (not SM100/SM103). They are wired into
l0_h100.yml(pre-merge, single-GPU)next to the other MoE-component unit tests, so they add coverage on Hopper
rather than consuming scarce Blackwell pre-merge capacity.
The Blackwell-gated K3 suites (
kimi_kda,kimi_k3_attn_res,kimi_k3_situ_moe, KDA parity) are already wired inl0_b200.ymlandl0_gb300_multi_gpus.yml(landed under this ticket in #17413); this fills thelast gap for the any-CUDA K3 MoE files. Addresses item 1.4 of TRTLLM-15177.
Test-list-only change — no source/API changes.
Test Coverage
The three added entries are the tests themselves. Validated with the repo's
own checker:
(also runs as the "Validate test list entries exist in source files (AST)"
pre-commit hook, which passed on commit.)
PR Checklist
Dev Engineer Review
tests/integration/test_lists/test-db/l0_h100.yml.test_kimi_k3_mlp.pytest_kimi_k3_moe_gate.pytest_kimi_k3_situ_and_mul.pyQA Engineer Review
tests/integration/test_lists/test-db/l0_h100.yml.