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c393728
might work
ninjadrknss f031faa
Fixes based on review
ninjadrknss 9c28f8e
potential fixes
ninjadrknss dc2ac2b
Sync maybe works
ninjadrknss 1771f2b
rename
ninjadrknss d8509ac
extern
ninjadrknss 2131fac
Update u_rtc.c
ninjadrknss b058637
Update u_rtc.c
ninjadrknss ae8e09d
Build fixes
ninjadrknss 3542844
Merge branch 'main' into feature/rtc-driver
jr1221 3b486bc
some simplifications, yet untested
jr1221 1f7b7aa
it prints time!
jr1221 a410b2e
further simplifications, working?
jr1221 c03ca7b
alt rtc
jr1221 c8e8764
Merge branch 'main' into feature/ethernet-rtc-alt
jr1221 35f70ac
compile fixups
jr1221 03f83c6
it works lfg
jr1221 5f1e2a0
state stm
jr1221 68195fd
fmt
jr1221 1407336
docs
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| Original file line number | Diff line number | Diff line change |
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| @@ -1,4 +1,5 @@ | ||
| .vscode/ | ||
| .idea/ | ||
| __pycache__/ | ||
| *.egg-info/ | ||
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| Original file line number | Diff line number | Diff line change |
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| @@ -0,0 +1,12 @@ | ||
| #ifndef RTC_H | ||
| #define RTC_H | ||
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| #include "nxd_ptp_client.h" | ||
| #include "nx_api.h" | ||
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| UINT nx_ptp_client_hard_clock_callback(NX_PTP_CLIENT *client_ptr, | ||
| UINT operation, NX_PTP_TIME *time_ptr, | ||
| NX_PACKET *packet_ptr, | ||
| VOID *callback_data); | ||
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| #endif // RTC_H |
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| Original file line number | Diff line number | Diff line change |
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| @@ -0,0 +1,163 @@ | ||
| #include "nxd_ptp_client.h" | ||
| #include "u_rtc.h" | ||
| #include "stm32h5xx_hal.h" | ||
| #include "u_tx_debug.h" | ||
| #include "tx_api.h" | ||
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| /// This file implements the PTP client callback to manage time for a STM32H563. | ||
| /// This is where the interface between the PTP client and the timebase is. | ||
| /// This was written using RM0481 and partially using source code from UM3131. | ||
| /// | ||
| /// The timebase for the clock used is listed as clk_ptp_ref_i. | ||
| /// The PTP Offload feature is NOT utilized because it is very half-baked. | ||
| /// Instead we simply use the internal clock reference and a userspace UDP impl. | ||
| /// | ||
| /// Tuning: The status of this operation can be found by using eth_ptp_pps_out. | ||
| /// There may be some register setup to enable PPS. | ||
| /// | ||
| /// Docs: This mostly follows the procedure in page RM0481 2792 57.9.9 | ||
| /// This uses coarse timestamping digital rollover mode. | ||
| /// | ||
| /// Requirements: | ||
| /// 1 billion must be divisible by the frequency value of Pll1_Q. | ||
| /// This will turn on Pll1_Q if it is not on already. | ||
| /// | ||
| /// Future improvements: | ||
| /// - Use fine update mode to reduce jitter | ||
| /// - Use binary rollover mode for sub-ns precision (lol) | ||
| /// | ||
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| extern ETH_HandleTypeDef heth; | ||
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| #define PTP_UTC_OFFSET 0 // UTC 0 | ||
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| UINT nx_ptp_client_hard_clock_callback(NX_PTP_CLIENT *client_ptr, | ||
| UINT operation, NX_PTP_TIME *time_ptr, | ||
| NX_PACKET *packet_ptr, | ||
| VOID *callback_data) | ||
| { | ||
| TX_INTERRUPT_SAVE_AREA | ||
| switch (operation) { | ||
| case NX_PTP_CLIENT_CLOCK_INIT: | ||
| TX_DISABLE | ||
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| // see 57.9.9 | ||
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| // Mask the Timestamp Trigger interrupt | ||
| CLEAR_BIT(heth.Instance->MACIER, ETH_MACIER_TSIE); | ||
| SET_BIT(heth.Instance->MACTSCR, ETH_MACTSCR_TSENA); | ||
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| SET_BIT(heth.Instance->MACTSCR, | ||
| ETH_MACTSCR_TSCTRLSSR); // 1 ns | ||
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| // each step is 1ns, with a clock of clk_ptp_ref_i | ||
| // clk_ptp_ref_i comes from pll1_q_clk (eth clock) (pg 456) | ||
| // this cool API gives us the frequency (in hz) | ||
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| // for some reason we need to enable pll1q output? | ||
| SET_BIT(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1QEN); | ||
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| PLL1_ClocksTypeDef pll1; | ||
| HAL_RCCEx_GetPLL1ClockFreq(&pll1); | ||
| if (1000000000 % pll1.PLL1_Q_Frequency != 0) { | ||
| PRINTLN_ERROR( | ||
| "NOT PERFEECT DIVISOR PTP TIME WILL BE OFF -> CHECK PLL1Q!"); | ||
| } | ||
| uint32_t period_ns = 1000000000 / pll1.PLL1_Q_Frequency; | ||
| MODIFY_REG(heth.Instance->MACSSIR, | ||
| ETH_MACMACSSIR_SNSINC, | ||
| period_ns << ETH_MACMACSSIR_SSINC_Pos); | ||
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| // placeholder just to get the clock ticking | ||
| WRITE_REG(heth.Instance->MACSTNUR, 0); | ||
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| // September 9th, 2001 | ||
| WRITE_REG(heth.Instance->MACSTSUR, 1000000000); | ||
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| SET_BIT(heth.Instance->MACTSCR, ETH_MACTSCR_TSINIT); | ||
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| while (READ_BIT(heth.Instance->MACTSCR, | ||
| ETH_MACTSCR_TSINIT)) { | ||
| } | ||
| // clear the seconds register now so we dont need to do it for a subsecond update | ||
| CLEAR_REG(heth.Instance->MACSTSUR); | ||
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| TX_RESTORE | ||
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| break; | ||
| case NX_PTP_CLIENT_CLOCK_SET: | ||
| /// A large jump in time | ||
| TX_DISABLE | ||
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| // use overwrite, not add | ||
| WRITE_REG(heth.Instance->MACSTNUR, | ||
| time_ptr->nanosecond); | ||
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| // WARNING travelers of future: this code suffers from the year 2106 problem | ||
| // Use seconds_high to account for this, but note the silicon also has this issue | ||
| WRITE_REG(heth.Instance->MACSTSUR, | ||
| time_ptr->second_low); | ||
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| SET_BIT(heth.Instance->MACTSCR, ETH_MACTSCR_TSINIT); | ||
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| while (READ_BIT(heth.Instance->MACTSCR, | ||
| ETH_MACTSCR_TSINIT)) { | ||
| } | ||
| // clear the seconds register now so we dont need to do it for a subsecond update | ||
| CLEAR_REG(heth.Instance->MACSTSUR); | ||
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| TX_RESTORE | ||
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| break; | ||
| case NX_PTP_CLIENT_CLOCK_PACKET_TS_EXTRACT: // FALL THROUGH | ||
| case NX_PTP_CLIENT_CLOCK_GET: | ||
| /// Retrieve time, usually for packet timestamping | ||
| TX_DISABLE | ||
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| time_ptr->nanosecond = READ_REG(heth.Instance->MACSTNR); | ||
| time_ptr->second_low = READ_REG(heth.Instance->MACSTSR); | ||
| time_ptr->second_high = 0; | ||
| TX_RESTORE | ||
| break; | ||
| case NX_PTP_CLIENT_CLOCK_ADJUST: | ||
| /// A small adjustment in time (<1 second) | ||
| TX_DISABLE | ||
| // use add, not overwrite. | ||
| // MACTSUR must be 0 at this point, not wasting CPU time though | ||
| if (time_ptr->nanosecond >= 0) { | ||
| // this will automatically clear the ADDSUB so we add | ||
| WRITE_REG(heth.Instance->MACSTNUR, | ||
| time_ptr->nanosecond); | ||
| } else { | ||
| // take complement starting from one million | ||
| uint32_t complement = | ||
| 1000000000 - abs(time_ptr->nanosecond); | ||
| // with ADDSUB defined it will subtract, but complement must be taken | ||
| WRITE_REG(heth.Instance->MACSTNUR, complement); | ||
| SET_BIT(heth.Instance->MACSTNUR, | ||
|
jr1221 marked this conversation as resolved.
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| ETH_MACSTNUR_ADDSUB); | ||
| } | ||
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| SET_BIT(heth.Instance->MACTSCR, ETH_MACTSCR_TSUPDT); | ||
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| TX_RESTORE | ||
| break; | ||
| case NX_PTP_CLIENT_CLOCK_PACKET_TS_PREPARE: | ||
| /// Push a packet with a timestamp | ||
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| time_ptr->nanosecond = READ_REG(heth.Instance->MACSTNR); | ||
| time_ptr->second_low = READ_REG(heth.Instance->MACSTSR); | ||
| time_ptr->second_high = 0; | ||
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| nx_ptp_client_packet_timestamp_notify( | ||
| client_ptr, packet_ptr, time_ptr); | ||
| break; | ||
| case NX_PTP_CLIENT_CLOCK_SOFT_TIMER_UPDATE: // do nothing | ||
| break; | ||
| default: | ||
| PRINTLN_ERROR("How Did We Get Here? (rtc)"); | ||
| break; | ||
| } | ||
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| return NX_SUCCESS; | ||
| } | ||
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