bsp: allwinner: fix RT-Smart boot on D1

[lanceharvie]

Problem

The Allwinner D1 RT-Smart BSP retained stale startup, MMU, serial, and storage integration code which prevented successful operation on real D1/C906 hardware.

Problems included an obsolete MMU initialization path and kernel address assumptions, allocation before heap initialization, duplicate BSS and UART initialization, Serial V1 configuration, an incorrect console device and baud default, and missing D1 SDMMC partition integration.

Resolution

• Migrate D1 board initialization to the current common64 MMU model.
• Identity-map the D1 kernel region at its real 0x45000000 load address.
• Initialize the heap before allocating BSP components.
• Remove duplicate BSS and UART HAL initialization.
• Enable Serial V2 with UART0 at 115200 8N1.
• Restore the D1 SDMMC0 partition port using current device APIs.
• Mount ROMFS as a deterministic root filesystem.
• Resolve watchdog/reset ownership and stale configuration dependencies.
• Document the D1/C906 hardware and current build procedure.

Validation

The functional bring-up was tested on real Allwinner D1 / T-Head C906 hardware in the Sipeed Lichee RV 86 Panel class and reached an interactive RT-Smart shell:

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Runtime testing covered scheduler operation, system ticks, thread sleep/wakeup, UART0 console, SDMMC block access, ROMFS/devfs, lwIP initialization, and kernel heap/page allocation.

The master-based series builds successfully with the RT-Thread RISC-V musl toolchain:

text      775663
data       46560
bss       417024
total    1239247

The hardware-validated prototype was based on RT-Thread v5.0.2. This current-master adaptation still requires a final board regression using firmware with the corrected T-Head CLINT devicetree binding; that firmware change is separate from this RT-Thread series.

[CLAassistant]

All committers have signed the CLA.

[github-actions]

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