Prepare qcom-next based on tag 'Linux 7.2-rc1' of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git#805
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Update reserved memory regions for Shikra aligning with new set of no-map regions. Signed-off-by: Bibek Kumar Patro <bibek.patro@oss.qualcomm.com>
Fix compatible entries for apps_smmu and adreno_smmu nodes, add missing "qcom,adreno-smmu" compatible entry for adreno_smmu node. Signed-off-by: Bibek Kumar Patro <bibek.patro@oss.qualcomm.com>
Modify MPM pin count to incorporate all MPM interrupts that can be configured. Signed-off-by: Sneh Mankad <sneh.mankad@oss.qualcomm.com>
Remove unused regulators (s1, s4, l1, l2, l11) and tighten min/max voltage ranges for remaining rails to match actual operating voltages derived from PGA report analysis. Signed-off-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com>
Add CX power domain support to GCC node on Shikra platform. Signed-off-by: Imran Shaik <imran.shaik@oss.qualcomm.com>
Modify compatible for Shikra mailbox APCS device and add fallback compatible string. Signed-off-by: Sneh Mankad <sneh.mankad@oss.qualcomm.com>
Add DT nodes for the CoreSight debug and trace subsystem on Qualcomm Shikra SoC. Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
Enable uart8 and add WCN3988 Bluetooth node with board-specific regulator supplies across CQM, CQS and IQS Shikra EVK variants. Signed-off-by: Yepuri Siddu <yepuri.siddu@oss.qualcomm.com>
Add the SoC-level display subsystem nodes for Shikra: MDSS wrapper, DPU display controller, DSI host controller, and 14nm DSI PHY. Shikra uses DPU 6.5 hardware (same as QCM2290), with platform-specific compatibles qcom,shikra-dpu and qcom,shikra-dsi-ctrl. The dispcc clock inputs for the DSI byte and pixel PLLs are wired from mdss_dsi0_phy. Signed-off-by: Mahadevan P <mahadevan.p@oss.qualcomm.com>
Enable the Shikra MDSS display subsystem on the CQM EVK board and add the DLC0697 panel node. Pin pm4125_l5 to 1.232V with regulator-allow-set-load for DSI PHY PLL stability. Signed-off-by: Mahadevan P <mahadevan.p@oss.qualcomm.com>
Add qcrypto and cryptobam support for shikra target. Link: https://lore.kernel.org/lkml/20260515-shikra_qcrypto-v1-3-80f07b345c29@oss.qualcomm.com/ Signed-off-by: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com>
Add True Random Number Generator(TRNG) node for shikra. Link: https://lore.kernel.org/lkml/20260514-shikra_rng-v1-2-4ea721a1429a@oss.qualcomm.com/ Signed-off-by: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com>
Add UFS inline crypto engine(ICE) support for shikra. Link: https://lore.kernel.org/lkml/20260515-shikra_ice_ufs-v1-2-b1b6ced70559@oss.qualcomm.com Signed-off-by: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com>
Add pm4125_s1 regulator node at fixed 1.396V to both shikra-cqm-som and shikra-cqs-som. This rail is used by the audio subsystem. Signed-off-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com>
Add a separate fixed dummy regulator for Bluetooth. Signed-off-by: Yepuri Siddu <yepuri.siddu@oss.qualcomm.com>
Enable the DLC0697 MIPI DSI display panel on the Shikra CQS EVK. Signed-off-by: Mahadevan P <mahadevan.p@oss.qualcomm.com>
Enable AudioCore Clock Controller (AudioCoreCC) support on Shikra platform. The Shikra CQM variant requires both clock and reset support, while the Shikra CQS variant requires only reset support. Hence, add support to configure the respective device tree nodes accordingly. Signed-off-by: Imran Shaik <imran.shaik@oss.qualcomm.com>
Remove pm8150b fallback compatible from pm4125_vbus and fix regulator constraints in shikra SOM DTS files to use microvolt instead of microamp. Signed-off-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com>
Enable the Modem Processor SubSystem (MPSS) remoteproc on Shikra CQS and IQS EVK boards Signed-off-by: Anurag Pateriya <apateriy@qti.qualcomm.com>
Add CPU-to-DDR BWMON nodes and their corresponding opp tables for Shikra SoC. This is necessary to enable power management and optimize system performance from the perspective of dynamically changing DDR frequencies. Signed-off-by: Sayantan Chakraborty <sayantan.chakraborty@oss.qualcomm.com> Signed-off-by: Komal Bajaj <komal.bajaj@oss.qualcomm.com>
Add Epoch Subsystem (EPSS) L3 interconnect provider node for Shikra SoC. Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com>
Add required nodes to enable the upstream BAM-DMUX WWAN driver on Shikra. The SMSM (Shared Memory State Machine) node provides the power control signaling between the AP and modem for BAM-DMUX. The BAM DMA controller node describes the A2 modem BAM hardware as a standard DMA controller. The BAM-DMUX node references the DMA channels and the pc/pc-ack interrupt lines from the modem SMSM entry for power control signaling. Signed-off-by: Vishnu Santhosh <vishnu.santhosh@oss.qualcomm.com>
Add node for the Shikra camera subsystem. Co-developed-by: Vikram Sharma <vikramsa@qti.qualcomm.com> Signed-off-by: Vikram Sharma <vikramsa@qti.qualcomm.com> Signed-off-by: Nihal Kumar Gupta <nihal.gupta@oss.qualcomm.com>
Qualcomm Shikra SoC has one Camera Control Interface (CCI) containing two I2C hosts. Signed-off-by: Nihal Kumar Gupta <nihal.gupta@oss.qualcomm.com>
Add pinctrl configuration for the four available camera master clocks. Signed-off-by: Nihal Kumar Gupta <nihal.gupta@oss.qualcomm.com>
Shikra CQM and CQS are retail variants sharing the same PM4125 PMIC and identical camera supply rails. The only difference between them is the integrated modem on CQM, which does not affect camera hardware. Add a shared overlay for optional IMX577 integration via CSIPHY1, used by both CQM and CQS EVK boards. Signed-off-by: Nihal Kumar Gupta <nihal.gupta@oss.qualcomm.com>
Shikra IQS is an industrial-grade variant using PM8150 PMIC, requiring different CSIPHY and sensor supply rails compared to the retail boards (CQM and CQS) which use PM4125. Add a dedicated overlay for optional IMX577 integration via CSIPHY1. Signed-off-by: Nihal Kumar Gupta <nihal.gupta@oss.qualcomm.com>
Add OPP tables required to scale DDR and L3 per freq-domain on Shikra SoC. Signed-off-by: Sayantan Chakraborty <sayantan.chakraborty@oss.qualcomm.com> Signed-off-by: Komal Bajaj <komal.bajaj@oss.qualcomm.com>
Update the cpufreq sclaing node compatible as per the latest bindings. Signed-off-by: Imran Shaik <imran.shaik@oss.qualcomm.com>
Add the A704 GPU and GMU wrapper device tree nodes to shikra.dtsi, including register mappings, clock, interconnect, IOMMU, OPP table, and zap shader region. Enable the GPU and set the zap shader firmaware path on all three Shikra board variants (cqm-evk, cqs-evk, iqs-evk). Signed-off-by: Aditya Sherawat <asherawa@qti.qualcomm.com>
# Conflicts: # drivers/remoteproc/qcom_q6v5_pas.c
# Conflicts: # arch/arm64/boot/dts/qcom/monaco.dtsi
# Conflicts: # arch/arm64/boot/dts/qcom/Makefile
# Conflicts: # arch/arm64/boot/dts/qcom/qcs8300-ride.dts # drivers/bluetooth/hci_qca.c # drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
# Conflicts: # drivers/soc/qcom/smem.c
# Conflicts: # drivers/dma/qcom/bam_dma.c # drivers/gpu/drm/bridge/lontium-lt9611c.c # drivers/misc/fastrpc.c # sound/soc/qcom/qdsp6/q6prm.h
# Conflicts: # Documentation/devicetree/bindings/sound/qcom,q6apm-dai.yaml
Adding merge log file and topic_SHA1 file Signed-off-by: Salendarsingh Gaud <sgaud@qti.qualcomm.com>
🔨 Build Failure Analysis — PR #805PR: #805
VerdictBoth errors are introduced by this PR. The build failures are caused by device tree syntax errors in the PR changes. 📎 Detailed analysis: Full report |
🔨 Build Failure Analysis — PR #805PR: #805
VerdictBoth errors are introduced by this PR. The build failures block DTB compilation for lemans and kaanapali platforms. 📎 Detailed analysis: Full report |
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Name SHA Commits
tech/bsp/clk dcf6518 22
tech/bsp/soc-infra 600ea9c 24
tech/bsp/pinctrl 79149ef 1
tech/bsp/remoteproc ce284ee 9
tech/bus/peripherals fedd8c6 6
tech/bus/pci/all ebd808f 4
tech/bus/pci/phy ec405c8 4
tech/bus/usb/dwc 9dd47ad 3
tech/bus/usb/phy c3aa7d5 35
tech/debug/hwtracing ee4a490 31
tech/pmic/misc 6fb618c 8
tech/mem/iommu 44df12a 8
tech/mm/audio/all 88b8f29 8
tech/mm/camss c394dfb 32
tech/mm/drm b480a07 65
tech/mm/fastrpc e014e35 11
tech/mm/video dc89f72 32
tech/mm/gpu 4433b06 6
tech/net/ath a915440 14
tech/pm/power bb88701 13
tech/pm/thermal d36b3ee 7
tech/security/crypto c36112e 14
tech/security/ice beabac0 9
tech/storage/all d86d915 4
tech/all/dt/qcs6490 d705803 21
tech/all/dt/qcs9100 3853a49 91
tech/all/dt/qcs8300 e93aa15 24
tech/all/dt/qcs615 1cc303d 8
tech/all/dt/agatti c828f10 1
tech/all/dt/hamoa 723e3ef 32
tech/all/dt/kaanapali f6ed56b 20
tech/all/dt/pakala b2e5e96 12
tech/all/config 2f8abb9 69
tech/overlay/dt cb96f06 68
tech/all/workaround ecc1260 26
tech/mproc/all 0aa90b7 3
tech/noup/debug/all cbdd4bb 26
tech/hwe/unoq a2d85fe 4
early/hwe/shikra/drivers f5654fe 160
early/hwe/shikra/dt e6da759 122