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Update related projects link in README.md and minor website edits. Build and publish release #125: Commit 5a9d67e pushed by fdxmw
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Deploy GitHub pages from GitHub actions with Sphinx (#489) Build and publish release #124: Commit d4c22cb pushed by fdxmw
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Update concat to immediately concatenate Consts, returning a new … Build and publish release #123: Commit 1a7c606 pushed by fdxmw
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name_scope is a context manager that prepends prefixes to `WireVect… Build and publish release #122: Commit d05a872 pushed by fdxmw
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Remove unnecessary slice (s) LogicNets from sign_extended and `… Build and publish release #121: Commit 96fbc6f pushed by fdxmw
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Fix an output_to_verilog bug where inlined arithmetic expressions m… Build and publish release #120: Commit 9454d07 pushed by fdxmw
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Enable Python test GitHub actions workflow on the windows-latest ru… Build and publish release #119: Commit 82d8858 pushed by fdxmw
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Update CHANGELOG.md for 1.0.2 release. Build and publish release #118: Commit 954dcc1 pushed by fdxmw
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Update CHANGELOG.md for 1.0.2 release. Build and publish release #117: Commit 954dcc1 pushed by fdxmw
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Fix a bug in CompiledSimulation's arm64 multiplication macro. Ena… Build and publish release #116: Commit 6134908 pushed by fdxmw
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Update CHANGELOG.md for 1.0.1 release. Build and publish release #115: Commit c5b83f2 pushed by fdxmw
4m 11s 1.0.1
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Update CHANGELOG.md for 1.0.1 release. Build and publish release #114: Commit c5b83f2 pushed by fdxmw
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Upgrade GitHub actions. Build and publish release #113: Commit 42f9e0a pushed by fdxmw
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Add a warning about signed logic to output_to_verilog's documentati… Build and publish release #112: Commit c8b4971 pushed by fdxmw
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Fix a CompiledSimulation concat bug. (#498) Build and publish release #111: Commit baaf61f pushed by fdxmw
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Apply ConsecutiveSlice optimizations to CompiledSimulation for ~4… Build and publish release #110: Commit 34a4538 pushed by fdxmw
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Clean up FastSimulation's handling of slice (s) LogicNets for ~… Build and publish release #109: Commit 1c9ce1f pushed by fdxmw
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Speed up Simulation by moving the declaration of the simple_func di… Build and publish release #108: Commit d3eee38 pushed by fdxmw
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Update robots.txt to allow indexing https://pyrtl.readthedocs.io/ Build and publish release #107: Commit 0dbbbc6 pushed by fdxmw
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rtllib documentation cleanup (#491) Build and publish release #106: Commit 0139256 pushed by fdxmw
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Clean up Kogge-Stone and carry-lookahead adder implementations so the… Build and publish release #105: Commit 443e47e pushed by fdxmw
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Add a screenshot of the first example's output to the documentation h… Build and publish release #104: Commit 987b09c pushed by fdxmw
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Add doctest examples for output_to_verilog, `output_verilog_testben… Build and publish release #103: Commit f68c7ee pushed by fdxmw
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Stop using file=sys.stdout as a default argument and add more docum… Build and publish release #102: Commit 0afe421 pushed by fdxmw
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Update visualization examples to open files with a context manager, s… Build and publish release #101: Commit 2c65eff pushed by fdxmw
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