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Fix an output_to_verilog bug where inlined arithmetic expressions might unintentionaly truncate. - #501

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fdxmw merged 2 commits into
UCSBarchlab:developmentfrom
fdxmw:verilog
Jul 28, 2026
Merged

Fix an output_to_verilog bug where inlined arithmetic expressions might unintentionaly truncate.#501
fdxmw merged 2 commits into
UCSBarchlab:developmentfrom
fdxmw:verilog

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Commits on Jul 28, 2026